To install the marathon ACX-QP in your computer, plug it into a PCIe Gen. 2 x4 slot or higher. The following image shows a marathon ACX-QP with two cameras connected:
Image processing functionality is available on request. If you are interested, contact Basler Support.
Production Line Integration#
For integration into a production line, marathon ACX-QP offers multiple general purpose inputs and outputs. 4 to 20 of the GPIOs (depending on the hardware add-ons used) are galvanically isolated.
These GPIOs enable you to do the following:
- Control peripheral devices by sending trigger signals, e.g. lighting signals and cameras signals.
- Receive various trigger signals from peripheral devices, e.g., shaft encoders and light barriers.
- Synchronize multiple marathon ACX-QP frame grabbers.
- Synchronize connected devices.
Software Programming and Configuration Interface#
marathon ACX-QP offers an easy-to-use API. The Framegrabber API allows to integrate the frame grabber into any image processing application. You can use the Framegrabber API to write code in the following languages:
- C# (wrapper available)
- Python (wrapper available)
For more information about the Framegrabber API, see the Framegrabber API documentation.
Alternatively, you can use Basler's GenTL Interface to develop your application in form of a GenTL consumer. For more information about the Basler GenTL Interface, see GenTL Interface documentation.
Connectors and LEDs#
marathon ACX-QP has the following connectors:
In addition to its ports, marathon ACX-QP offers an on-board configuration switch for activating a fall-back FPGA configuration, called SAVE configuration. For details regarding the SAVE configuration, see FPGA Fall-Back Configuration.
LEDs on the Slot Bracket#
There is one LED located on the slot bracket of marathon ACX-QP that indicate the state of the CXP link:
Connection at CXP link ready for operation
No connection at CXP link
LEDs on the Board#
|LED Name||LED Color||Meaning|
|TRG_PWR||Green||Front GPIO is connected to external power (power IN).|
|SAVE||RED||SAVE configuration is used for FPGA configuration|
|READY||Orange||The FPGA has been configured successfully and is ready for operation. LED READY also gives light when SAVE configuration is used on FPGA.|
|PGOOD||Orange||PGOOD=Power Good |
All voltages are applied correctly.
|1||Orange||User-defined. The LEDs can be controlled via software. They aren't related to camera connectors and can be used for any purpose.|
|2||Orange||User-defined. The LEDs can be controlled via software. They aren't related to camera connectors and can be used for any purpose.|
|3||Orange||User-defined. The LEDs can be controlled via software. They aren't related to camera connectors and can be used for any purpose.|
|PWR (upper LED)||Green||Frame grabber gets 12 VDC IN via PCIe interface.|
|PWR (lower LED)||Green||Frame grabber gets voltage IN via the computer power supply connector for powering the cameras via CXP cable.|
|Host Interface||PCIe Gen 2 x4 (Direct Memory Access)|
|Bandwidth (typ./max.)||Up to 1.8 GB/s sustainable data bandwidth|
|On-Board Memory||1 GByte DDR3-RAM|
|Power Supply (Input) / Current PCIe Slot||12 VDC (±5 %) / <1.5 A (actual values depend on processing)|
|Power Supply (Input) / Current PCIe 6-pin Connector||12 VDC (±5 %) / <6.5 A (actual values depend on connected PoCXP cameras)|
|PoCXP Supply (Output)||17 W of 24 VDC regulated power per CoaXPress connector|
|Power Consumption||Typ. 1.075 A @ 12 VDC (actual values depend on image pre-processing), maximum load: 3.15 A (single supply over 4-pin power connector)|
|Size (L x H)||PCIe standard height |
Half length card:
167.64 mm x 111.15 mm
|Camera Interface||4 x CXP-6 (CXP-1 to CXP-6, DIN connectors)|
|Ambient Temperature||50 °C (0 LFMa) |
60 °C (100 LFMa)
An adequate airflow in the computer is recommended.
|FPGA Operating Temperatureb||0–85 °C at 100 LFMa|
|Storage Temperature||-50–80 °C|
|Humidity during Operation||5–90 % non-condensing|
|Humidity during Storage||5–95 %|
LFM = Linear Feet per Minute, unit for measuring airflow velocity.
Temperature being measured directly on the FPGA. You can read out the measured value in all applets that are available for marathon ACX-QP via the applet parameter
The PCIe bus data throughput depends on the mainboard, the chip set, and the BIOS configuration of the host computer. The number of installed PCIe boards also affects the throughput, e.g. a PCIe x8 connector may support only x4 performance. Always check the mainboard manual thoroughly to be sure.
The Front GPIO Connector#
The front GPIO connector covers the basic trigger setup of your frame grabber. Its trigger connector allows you to control peripheral devices (PLC) and to synchronize multiple marathon ACX-QP boards.
The socket is located directly on the slot bracket:
In default configuration, the trigger connector of the front GPIO connector offers:
- 3 differential input signals or 2 differential and 1 single-ended input signal in pull-up mode
- 2 TTL output signals
You can configure the pin assignment of the front GPIO connector to provide different input signals, e.g.:
- 4 single-ended signals (and no differential signals).
To change the GPIO configuration, use the command line tool installed with the Framegrabber SDK.
Pin Layout of the Front GPIO Connector#
|PIN Number (3P FPGA)||Galvanically Isolated||Signal||Reference Signal|
|1||No||GPO 0 (TTL)||5 VDC / global GND (pin 6)|
|2||No||GPO 1 (TTL)||5 VDC / global GND (pin 6)|
|3||No||Reserved for RS 485 (GND)|
|4||No||Reserved for RS 485|
|6||No||GND (global GND)|
|7||No||5 V_OUT (0.5 A max)|
|8||Yes||GPI 2 (if used for differential signal)||GPI voltage IN (pin 10) / GPI GND (pin 15)|
|9||Yes||GPI 3 (if used for differential signal)||GPI voltage IN (pin 10) / GPI GND (pin 15)|
|10||Yes||GPI voltage IN (4.5–28 VDC)|
|11||Yes||GPI 0+||GPI voltage IN (pin 10) / GPI GND (pin 15)|
|12||Yes||GPI 0-||GPI voltage IN (pin 10) / GPI GND (pin 15)|
|13||Yes||GPI 1+||GPI voltage IN (pin 10) / GPI GND (pin 15)|
|14||Yes||GPI 1-||GPI voltage IN (pin 10) / GPI GND (pin 15)|
Extra Voltage IN/GND for Galvanically Isolated Circuit#
All General Purpose Inputs (GPIs) of the front GPIO connector are galvanically isolated. The incoming signals are transferred to the frame grabber via digital isolators. This way, the frame grabber is securely protected against high incoming voltages.
However, to operate the internal GPI circuits, you must connect a voltage source and ground: On pin 10, you apply the voltage (GPI voltage IN) that serves as operating voltage for the internal operational amplifiers. On pin 15, you connect the according ground (GPI GND).
Supply Voltage Required
The marathon ACX-QP trigger system needs to get supply voltage on the GPI Voltage IN pin (pin 10). If you want to connect devices that have no PWR pin, you must provide the power supply to the GPI Voltage IN pin (pin 10) from an external source.
You can operate marathon ACX-QP as follows:
|Number of Cameras||Number of Camera Ports||Number of Frame Grabber Ports||Mode||Topology|
When connected to the computer power supply via the PCIe 6-pin connector, which always provides 12 V, marathon ACX-QP supports Power over CXP (PoCXP).
If you are going to use multiple marathon ACX-QP boards in one host computer, make sure you have one PCIe Gen. 2.0 x4 slot or higher per board available in the host computer. For more information, see the following topics:
To ensure optimum use of system resources, not all image acquisition and processing features designed for marathon ACX-QP are loaded onto marathon ACX-QP simultaneously.
Instead, Basler provides various compilations of specific image acquisition and processing features that are combined to meet the requirements of a specific application field. These compilations are called applets, since they work like apps on mobile devices.
Typically, an applet supports a specific camera interface standard and topology, specific image acquisition features, and possibly specific image (pre-)processing features.
Applets come in .dll files.
Refer to Acquisition Applets for marathon ACX-QP for more detailed information about applets and their dependency on the topology used.