Library Memory

The Memory library includes operators for buffering data, resorting data, and random access to data. Many different operators exist. They all implement their own idea of memory access.

The operators are either using Frame Grabber RAM (DRAM), FPGA-internal block RAM, or FPGA distributed RAM (LUT RAM). The following table shows an overview of which memory type is used by the individual operators.

Name Memory Type
CoefficientBuffer frame grabber RAM
FrameBufferRandomRead frame grabber RAM
FrameMemory FPGA-internal block RAM
FrameMemoryRandomRd FPGA-internal block RAM
ImageBuffer frame grabber RAM
ImageBufferMultiRoI frame grabber RAM
ImageBufferMultiRoIDyn frame grabber RAM
ImageBufferSC frame grabber RAM
ImageBufferSpatial frame grabber RAM
ImageFifo automatically selected between FPGA-internal block RAM and FPGA distributed RAM
ImageSequence frame grabber RAM
KneeLUT FPGA-internal block RAM
LineMemory FPGA-internal block RAM
LineMemoryRandomRd FPGA-internal block RAM
LUT FPGA-internal block RAM
RamLUT frame grabber RAM
ROM FPGA-internal block RAM

Table 32. Memory Types of Operators in the Library Memory


Operators might require additional FPGA-internal block RAM for buffering even if they are using Frame Grabber RAM.

The delay, i.e., latency of a memory operator, depends on the operator's implementation. Some operators only have a short pixel delay, while others have a line or frame delay. The following table lists the delay of the individual memory operators.

Name Latency
CoefficientBuffer None: Will always output data if output is not blocked.
FrameBufferRandomRead Minimum 1 frame: As soon as frame is fully written reading starts using address inputs. If output is blocked, operator buffers input data. Latency also depends on presence of read address data.
FrameMemory 1 frame: Reading starts after frame has been fully written into the buffer.
FrameMemoryRandomRd 1 frame: Reading can start after frame has been fully written into the buffer. Latency depends on presence of read address data.
ImageBuffer Minimum 1 line: Output starts reading a line as soon as it is fully written into the buffer. If output is blocked, operator buffers input data.
ImageBufferMultiRoI Minimum 1 frame: Reading starts after frame has been fully written into the buffer. If output is blocked, operator buffers input data.
ImageBufferMultiRoIDyn Minimum 1 frame: Reading using coordinate inputs starts after frame has been fully written into the buffer. If output is blocked, operator buffers input data.
ImageBufferSC Minimum 1 line: Output starts reading a line as soon as it is fully written into the buffer. If output is blocked, operator buffers input data.
ImageBufferSpatial Minimum 1 line: Output starts reading a line as soon as it is fully written into the buffer. If output is blocked, operator buffers input data.
ImageFifo No latency. Only if output is blocked, operator buffers and delays input data.
ImageSequence Minimum SequenceLength frames: Reading starts after all frames of a sequence have been fully written into the buffer. If output is blocked, operator buffers input data.
KneeLUT No latency
LineMemory 1 line: Reading starts after line has been fully written into the buffer.
LineMemoryRandomRd 1 line: Reading can start after line has been fully written into the buffer. Latency depends on presence of read address data.
LUT No latency
RamLUT Latency of some clock cycles only. Depends on addresses.
ROM No Latency

Table 33. Individual Latencies of the Operators in Library Memory


The following list summarizes all Operators of Library Memory

Operator Name Short Description available since
CoefficientBuffer

Allows the upload of image files from PC to frame grabber and uses them as image source.

Version 1.1
FrameBufferRandomRead

FrameBufferRandomRead is a memory buffer with random read access.

Version 1.3
FrameMemory

FrameMemory is a small memory block with random write access.

Version 1.1
FrameMemoryRandomRd

FrameMemoryRandomRd is a small memory block with random read access.

Version 1.3
ImageBuffer

Buffers an image in Frame Grabber RAM (DRAM) with ROI selection.

Version 1.1
ImageBufferMultiRoI

Buffers the input image stream in Frame Grabber RAM (DRAM) and outputs an arbitrary number of ROIs from each input image.

Version 1.1
ImageBufferMultiRoIDyn

Buffers the input images in Frame Grabber RAM (DRAM) and transfers an arbitrary number of dynamic ROIs out of each image.

Version 1.1
ImageBufferSC

Buffers an image in Frame Grabber RAM (DRAM) with sensor correction and ROI selection.

Version 1.1
ImageBufferSpatial

Buffers the image in the Frame Grabber RAM (DRAM) and computes a spatial correction of lines.

Version 1.3
ImageFifo

Buffers a limited number of pixels in the FPGA internal RAM.

Version 1.1
ImageSequence

Buffers a sequence of images and output them simultaneously.

Version 1.1
KneeLUT

Implements an approximation of a Lookup table by a series of nodes.

Version 1.1
LineMemory

LineMemory is a small memory block with random write access.

Version 1.1
LineMemoryRandomRd

LineMemoryRandomRd is a small memory block with random read access.

Version 1.3
LUT

Implements a Lookup table of dynamic content.

Version 1.1
RamLUT

Implements a large Lookup table of dynamic content based on FPGA external RAM (i.e., the Frame Grabber RAM (DRAM)).

Version 1.3
ROM

Implements a Lookup table of dynamic content.

Version 1.1

Table 34. Operators of Library Memory