The LineMemoryRandomRd (line memory random read) operator is a small memory block with random read access. The random read of the data can be performed by transferring addresses to port RColA (read column address). The operator will use the addresses to read the line data by the given coordinates. The resulting output frame will have the image width of the address input.
For information on the latency of the operator, see Table 33, 'Individual Latencies of the Operators in Library Memory'.
The LineMemoryRandomRd operator stores incoming image lines and allows random read access. The line data is transferred into the operator via link I.
The required memory size is defined by the image width of the input frame (Max. Img Width).
The operator can be implemented in two variants. Namely, a single buffer implementation and a double buffer implementation. The first implementation saves RAM, but does not allow a timely overlap of writing and reading. Thus the address input links RColA and RRowA are stopped during the write state. The latter implementation doubles the RAM and allows to random read the last frame while accepting the next frame at the input link I.
The operator has two states:
Write State: The pixels of link I are stored linear in the buffer i.e. the coordinates of the pixels form the addresses in the buffer.
Read State: The memory is read-out using the addresses given at the input RColA. The number of addresses and address link image width define the image output width. For example, if a line consisting of only one pixel is input at the address inputs, the output frame width will only consist of one pixel. The other pixels of the input lines are discarded.
The image data input and the address input are not synchronous to each other. They may have different image dimensions.
Please not the timing of the input links. The address input must not be sourced by the same operator as the data link input I without buffering. This is because while writing the image data into the operator, no addresses to read the current frame can be accepted. Only if the frame is fully stored into the buffer, addresses can be accepted. In many applications operator is used to generate the images for the addresses.
The timing is visualized in the following figure.
The operator uses FPGA-internal block RAM memory. Thus non VisualApplets frame grabber resources of type RAM are used. The FPGA-internal block RAM is limited. Full resolution frames might not fit into the FPGA-internal block RAM. Consider using operator FrameBufferRandomRead instead.
Empty frames are not supported.
Images with varying line lengths are not supported.
|Input Links||I, image data input
RColA, read column address for the pixel at I
|Output Link||O, data input|
Synchronous and Asynchronous Inputs
- All inputs are asynchronous to each other.