VisualApplets


Table of Contents

User Manual
Introduction
VisualApplets
How to Use This Documentation
System Requirements
Getting Started
Writing Your First Applet
Running Your Applet on Hardware
Further Reading
Basic Functionality
Basic Principles
Workflow
Main Program Window
Entering a Design
Data Flow
Rules of Links
Diagram Parametrization
Allocation of Device Resources
Design Rules Check
Simulation
FPGA Resource Estimation
Build
SDK
Extended Functionality
Hierarchical Boxes
User Libraries
Custom Operator Libraries
Multiple Processes
Target Hardware Porting
PixelPlant Designs
System Settings
Design Settings
Build Settings
Tcl Scripting
Script Collection (Tcl)
Tcl Export
Print / Screenshot
Migration from Older Versions
Miscellaneous
Command Line Options
Keyboard Shortcuts
Error Reporting
Tutorial and Examples
Introduction
Hardware Applet: From Idea to Application
Workflow Description
Designing an Applet in VisualApplets
Building the Applet in VisualApplets
Running the Applet on Hardware
Basic Design Theory
Applet Parameterization
Multiple DMA Channel Designs
Synchronization of Asynchronous Image Pipelines
Basic Acquisition Designs for Varying Camera Types and Hardware Platforms
Basic Acquisition Examples for Camera Link Cameras for microEnable IV VD4-CL/-PoCL Frame Grabber
Basic Acquisition Examples for GigE Vision Cameras for microEnable IV Frame Grabber
Basic Acquisition Examples for Camera Link Cameras for marathon, LightBridge and ironman Frame Grabbers
Basic Acquisition Examples for CoaXPress Cameras for marathon and ironman Frame Grabbers
Processing Examples
Advanced
Binarization
Blob Analysis
Color
Co-Processor
Debugging and Test
Difference Images
Filter
Geometry
High Dynamic Range and Image Composition
Lookup Tables
Loop
Object Features
Shading Correction
Trigger
Operator Examples
Functional Example for Specific Operators of Library Accumulator and Library Logic
Functional Example for Specific Operators of Library Synchronization: Dynamic Append and Cut
Functional Example for Specific Operators of Library Memory and Library Signal
Functional Example for Specific Operators of Library Memory and Library Signal
Functional Example for Specific Operators of Library Signal
Functional Example for Specific Operators of Library Synchronization, Base and Filter
Functional Example for Specific Operators of Library Arithmentics: Trigonometric Functions
Parameter Library Examples
Parameter Redirection
Parameter Translation
User Library Parameter
Parameter Selection
Link Parameter Translation
Using Applets During Runtime
Filling LUT with Content With the Basler Framegrabber API
Operator Reference
Introduction
Library Overview
Library Accumulator
ColMax
ColMin
ColSum
Count
FrameMax
FrameMin
FrameSum
Histogram
ModuloCount
Register
RowMax
RowMin
RowSum
Library Arithmetics
ABS
ADD
ARCCOS
ARCCOT
ARCSIN
ARCTAN
ClipHigh
ClipLow
COS
COT
DIV
MULT
RND
SCALE
ShiftLeft
ShiftRight
SIN
SQRT
SUB
TAN
Library Base
BRANCH
CastBitWidth
CastColorSpace
CastKernel
CastParallel
CastType
CONST
ConvertPixelFormat
Coordinate_X
Coordinate_Y
Dummy
DynamicROI
EventToHost
ExpandToKernel
ExpandToParallel
GetStatus
HierarchicalBox
ImageNumber
KernelRemap
MergeComponents
MergeKernel
MergeParallel
MergePixel
NOP
PARALLELdn
PARALLELup
PseudoRandomNumberGen
SampleDn
SampleUp
SelectBitField
SelectComponent
SelectFromParallel
SelectROI
SelectSubKernel
SetDimension
SplitComponents
SplitKernel
SplitParallel
Trash
Library Blob
Definition
Definition of Object Features
VisualApplets Operators
Blob_Analysis_1D
Blob_Analysis_2D
Library Color
BAYER3x3Linear
BAYER5x5Linear
ColorTransform
HSI2RGB
RGB2HSI
RGB2YUV
WhiteBalance
WhiteBalanceBayer
Library Compression
ImageBuffer_JPEG_Gray
JPEG_Encoder_Gray
JPEG_Encoder
Library Debugging
ImageAnalyzer
ImageStatistics
StreamAnalyzer
Scope
ImageInjector
ImageTimingGenerator
ImageFlowControl
StreamControl
ImageMonitor
Library Filter
DILATE
ERODE
FIRkernelNxM
FIRoperatorNxM
HitOrMiss
LineNeighboursNx1
MAX
MEDIAN
MIN
NumberOfHits
PixelNeighbours1xM
SORT
Library Logic
AND
CASE
CMP_AgeB
CMP_AgtB
CMP_AleB
CMP_AltB
CMP_Equal
CMP_NotEqual
IF
IS_Equal
IS_GreaterEqual
IS_GreaterThan
IS_InRange
IS_LessEqual
IS_LessThan
IS_NotEqual
NOT
OR
XNOR
XOR
Library Memory
CoefficientBuffer
FrameBufferRandomRead
FrameMemory
FrameMemoryRandomRd
ImageBuffer
ImageBufferMultiRoI
ImageBufferMultiRoIDyn
ImageBufferSC
ImageBufferSpatial
ImageFifo
ImageSequence
KneeLUT
LineMemory
LineMemoryRandomRd
LUT
RamLUT
ROM
Library Parameters
EnumParamReference
EnumParamTranslator
EnumVariable
FloatFieldParamReference
FloatParamReference
FloatParamTranslator
FloatVariable
IntFieldParamReference
IntParamReference
IntParamTranslator
IntVariable
LinkProperties
LinkParamTranslator
StringParamReference
ResourceReference
IntParamSelector
FloatParamSelector
Library Hardware Platform
AppletProperties
BoardStatus
ActionCommand
CameraControl
BaseGrayCamera
BaseRgbCamera
MediumGrayCamera
MediumRgbCamera
FullGrayCamera
FullRgbCamera
CameraGrayArea
CameraGrayAreaBase
CameraGrayAreaFull
CameraGrayAreaMedium
CameraGrayLine
CameraGrayLineBase
CameraGrayLineFull
CameraGrayLineMedium
CameraRgbArea
CameraRgbAreaBase
CameraRgbAreaMedium
CameraRgbLine
CameraRgbLineBase
CameraRgbLineMedium
CLHSDualCamera
CLHSPulseIn
CLHSPulseOut
CLHSSingleCamera
CxpAcquisitionStatus
CXPDualCamera
CXPQuadCamera
CXPSingleCamera
DigIOPort
DmaFromPC
DmaToPC
GPI
GPO
LED
NativeTrgPortIn
NativeTrgPortInExt
NativeTrgPortOut
RxLink
TrgPortArea
TrgPortLine
TriggerIn
TriggerOut
TxLink
SignalToEvent
Library Prototype
COUNTER
CustomSignalOperator
HWMULT
PackBitsRLE
TrgBoxLine
RGB2XYZ
XYZ2LAB
Library Signal
DelayToSignal
Downscale
EventToSignal
FrameEndToSignal
FrameStartToSignal
Generate
GetSignalStatus
Gnd
LimitSignalWidth
LineEndToSignal
LineStartToSignal
PeriodToSignal
PixelToSignal
Polarity
PulseCounter
RsFlipFlop
RxSignalLink
Select
SetSignalStatus
ShaftEncoder
ShaftEncoderCompensate
SignalDebounce
SignalDelay
SignalEdge
SignalGate
SignalToDelay
SignalToPeriod
SignalToPixel
SignalToWidth
SignalWidth
SyncSignal
TxSignalLink
Vcc
WidthToSignal
Library Synchronization
AppendImage
AppendImageDyn
AppendLine
AppendLineDyn
CutImage
CutLine
CreateBlankImage
ExpandLine
ExpandPixel
ImageValve
InsertImage
InsertLine
InsertPixel
IsFirstPixel
IsLastPixel
PixelReplicator
PixelToImage
RemoveImage
RemoveLine
RemovePixel
ReSyncToLine
RxImageLink
SourceSelector
SplitImage
SplitLine
SYNC
TxImageLink
Overflow
Library Transformation
FFT
Appendix. Device Resources
Hardware Configuration of Supported Platforms
Device Resources of Supported Platforms
Shared Memory Concept
Glossary
Bibliography
Index

List of Figures

1. VisualApplets - From Idea to Image Processor in 15 Minutes
2. VisualApplets – Awarded Software Environment
3. VisualApplets Main Window
4. Start of a New Project
5. Dragging Operators from Libraries into the Design Window
6. Module Properties
7. Successful DRC
8. Build Settings for microEnable 5 / Xilinx Vivado
9. Simple VisualApplets Design
10. The Design Workflow
11. Main Program Window
12. Operator not available for currently selected target hardware platform
13. Project Info
14. Module Search
15. Module Search
16. DRC Log Information
17. Build Log Information
18. Example: Displaying Information on the MergeKernel Operator
19. Library Panel with Operator Library on Display
20. Library Panel with Operator Library on Display
21. Configuring the number of displayed recent designs
22. Start of a new Project
23. Edit Project Details
24. Menu Design, menu item Change FPGA Clock
25. Slider and spin box for selecting FPGA clock frequency
26. Operator Libraries
27. Error message in case an operator is not applicable for another hardware platform
28. Simple VisualApplets Design
29. Pixel Order
30. Model of a 2D Image Protocol
31. Model of a 1D Image Protocol
32. Model of an 0D Image Protocol
33. O-Type Network
34. Failing O-Type Network
35. Display of not correctly synchronized data flow in VisualApplets 2.2 and higher
36. M-type and O-type Network
37. M-type Operator with One Synchronous Input Group
38. M-type Operator with Asynchronous Inputs
39. Synchronization of Independent Sources
40. Deadlock at SYNC, figure a
41. Deadlock at SYNC, figure b
42. Fixed Deadlock
43. Deadlock Avoided
44. Bandwidth Limitation
45. Bandwidth Limitation Compensated
46. Infinite Source Connection Error
47. Infinite Source Connection OK
48. Infinite source conversion module (Buffer1) connected to a non-infinite source
49. O-type module with signal link inputs, sourced by different M-type modules
50. Module Properties Window
51. Field Parameter Edit Window
52. Function Dialog to Edit Field Parameters
53. Disabled Parameters
54. Parameters in Illegal States
55. Metadata Parameter
56. Invalid Source Port Link Properties
57. Invalid Destination Port Link Properties
58. Device Resource Allocation Window
59. Grayed-out resource CameraControl
60. Device Resource Conflict
61. Auto Correction of Device Resource Conflicts
62. DRC Level 1 Error
63. Creating New Simulation Sources and Probes
64. Simulation Sources Are Gray Image Frames, Simulation Probes Are Green Image Frames
65. Simulation Source Viewer
66. Viewing Options
67. Pixel Values
68. Zooming in the Magnifier
69. Thumbnail Display in Source
70. Highlighted Image Section Used for Simulation
71. sim[x] Indicates the Image that Is Simulated in a Sequence
72. Crosshair Cursors in Display Window and Magnifier
73. Pixel Values
74. Image Dimensions
75. Exceeded Image Dimensions
76. Bit Widths of Image and Link
77. Defining Offset for Image Bits to Use
78. Display Properties for 4-bit Image
79. Defining Offset for Link Bits to Use
80. Display Alignment
81. Pixel Merge
82. Merging Factor = 1, Image Properties Do Not Fit Link Properties
83. Merging Factor = 2, Properties of Merged Image Fit Link Properties
84. Simulation Window
85. Changing Source and Probe Display
86. Non-connected Simulation Modules
87. Simulation Settings
88. Second Simulation Step
89. Third Simulation Step
90. Successful Simulation
91. Pixel Values Probe
92. Display of Undefined Image Areas
93. Empty Image Symbol
94. Link View
95. Line Profile View
96. Line Histogram View
97. Image Histogram View
98. Save Options Dialog
99. File Format Options for Saving
100. Setting the Splitting Factor in the Save Options Dialog
101. Project Info Window
102. Detailed Information on FPGA Resource Estimation
103. Context Menu FPGA Resources
104. FPGA Resource Usage of Individual Module
105. Detected Xilinx tools
106. Selecting the Build Configuration for Applet Build
107. Target Runtime Selection during Applet Build
108. Repacking Hardware Applet Files Window
109. Fullfilled Repacking Preconditions
110. Selecting Target Operating System
111. Display of Specified Repacking Settings
112. Message after Successful Repacking
113. Selecting the Storing Location for the SDK Example
114. Example of a Hierarchical Box
115. Window tabs of the design window
116. Highlighting a Port
117. Highlighting a Port
118. Entering a port name
119. Renamed ports of a hierarchical box
120. Highlighting a port
121. Reordered input ports of a hierarchical box
122. User Libraries with Elements in the Library Panel
123. Saving a Hierarchical Box as a User Library Element
124. Adding documentation, version information, short description, and/or individual GUI Icon
125. Providing a password for a library element
126. Tooltip Information on User Library Element
127. Display of Your Library Element in Design
128. Saving New User Library Element
129. Adding documentation, version information, short description, and/or individual GUI Icon
130. Providing a password for a library element
131. Tooltip Information on User Library Element
132.
133. Protecting a user library element
134. Entering password for protected user library element
135. Opening the User Library Editor
136. Replacement of Instances
137. Custom Library with operators deesigned with VisualApplets Expert
138. Applet with Two Processes
139. Creating a New Process
140. Target Hardware Porting
141. Error message in case an operator is not applicable for new hardware platform
142. Dialog window for Path Settings
143. Dialog window for Simulation Settings
144. Example: If you always create applets for a Win64 system, you can set this operating system platform here as the default platform
145. Example: Win64 will be suggested by the program when you create a new applet design
146. Dialog window for Diagram Settings
147. Dialog window for Global Build Settings
148. Dialog window for common settings
149. Target Runtime Project Setting
150. Editing the Design Properties
151. Diagram Layout Settings
152. Selection of Hardware Platform
153. Build Settings Window
154. Vivado Supported by Target Hardware Design
155. Vivado not Supported by Target Hardware Design
156. Parameter Set Example: Developing for microEnable 5 or LightBridge
157. Defaut: All Build Flow Steps Activated
158. Subsequent Build Steps Deactivated
159. Keeping Build Files of the Individual Build Steps
160. Keeping Build Files of the Individual Build Steps
161. Command Mode Options
162. Command Mode "Use platform default value"
163. Command Mode "Append to platform default value"
164. Command Mode "Overwrite platform default value"
165. Handling Options
166. Script Collection in the VisualApplets program window
167. Exporting a Design
168. Importing a Design
169. VisualApplets Main Window
170. New Project window
171. Operator Documentation in VisualApplets
172. Example Design Implementation Sobel_Filter.va
173. Link Properties
174. Static and Dynamic Operator Parameters
175. Design Rule Check 1 and 2 for the Example Design Sobel_Filter.va
176. FPGA Resource Estimation
177. Build Hardware Applet Dialog
178. Firmware Partitions Displayed in microDiagnostics
179. Parameter Tree and Image Acquisition Window in microDisplay X
180. Generated SDK Project Files
181. Properties of Operator CameraGrayAreaBase
182. Changed the Link Bit Width of the Camera Operator
183. Bit Width Cannot be Changed at Buffer Module Output Link
184. Illegal Condition after Link Property Change
185. DRC Error Messages Invalid Parameters
186. Red Parameters show Illegal Condition
187. ConvertPixelFormat Operator Added for 16Bit Output
188. ShiftLeft Operator Added for 16Bit Output
189. Block Diagram of Threshold Binarization Design with Monitoring
190. Use of the Binarization Applet in microDisplay
191. VisualApplets design to switch between two cameras
192. Deadlock Configurations using InsertImage
193. Line Duplication
194. Basic Acquisition for Grayscale Camera Link Area Scan Cameras in Base Configuration Mode
195. Basic Acquisition for RGB Camera Link Area Scan Cameras in Base Configuration Mode
196. Basic Acquisition for Grayscale Camera Link Area Scan Cameras in Medium Configuration Mode
197. Basic Acquisition for RGB Camera Link Area Scan Cameras in Medium Configuration Mode
198. Basic Acquisition for Grayscale Camera Link Area Scan Cameras in Full Configuration Mode
199. Basic Acquisition for Grayscale Camera Link Area Scan Cameras in Full Configuration 10 Bit Mode
200. Basic Acquisition for Grayscale Camera Link Line Scan Cameras in Base Configuration Mode
201. Basic Acquisition for RGB Camera Link Line Scan Cameras in Base Configuration Mode
202. Basic Acquisition for Grayscale Camera Link Line Scan Cameras in Medium Configuration Mode
203. Basic Acquisition for Grayscale 12 Bit Camera Link Line Scan Cameras in Medium Configuration Mode
204. Basic Acquisition for Grayscale Camera Link Line Scan Cameras in Full Configuration Mode
205. Basic Acquisition for Grayscale GigE Vision Area Scan Cameras
206. Basic Acquisition for RGB GigE Vision Area Scan Cameras
207. Basic Acquisition for Grayscale GigE Vision Line Scan Cameras
208. Basic Acquisition for RGB GigE Vision Line Scan Cameras
209. Basic Acquisition for Grayscale Camera Link Area Scan Cameras in Base Configuration Mode on LightBridge VCL, marathon VCL and ironman VCL
210. Basic Acquisition for RGB Camera Link Area Scan Cameras in Base Configuration Mode on LightBridge VCL, marathon VCL and ironman VCL
211. Basic Acquisition for Grayscale Camera Link Area Scan Cameras in Medium Configuration Mode on LightBridge VCL, marathon VCL and ironman VCL
212. Basic Acquisition for RGB Camera Link Area Scan Cameras in Base Configuration Mode on LightBridge VCL, marathon VCL and ironman VCL
213. Basic Acquisition Design for marathon VCL, LightBridge VCL and ironman VCL Frame Grabber for Camera Link Area Scan Cameras in Full Configuration Mode
214. Basic Acquisition Design for marathon, LightBridge and ironman Frame Grabber for Grayscale Camera Link Line Scan Cameras in Base Configuration Mode
215. Basic Acquisition for Grayscale Camera Link Line Scan Cameras in Base Configuration Mode on the LightBridge VCL, marathon VCL and ironman VCL
216. Basic Acquisition Design for marathon, LightBridge and ironman Frame Grabber for RGB Camera Link Line Scan Cameras in Base Configuration Mode
217. Basic Acquisition Design for marathon, LightBridge and ironman Frame Grabber for Grayscale Camera Link Line Scan Cameras in Base Configuration Mode
218. Basic Acquisition Design for marathon, LightBridge and ironman Frame Grabber for RGB Camera Link Line Scan Cameras in Base Configuration Mode
219. Basic Acquisition for marathon, LightBridge and ironman Frame Grabber for Camera Link Line Scan Cameras in Full Configuration Mode
220. Basic Acquisition for Grayscale CoaxPress Area Scan Cameras in 6GBit/s Mode with Link Aggregation 1 on the ironman Frame Grabber
221. Basic Acquisition for RGB CoaxPress Area Scan Cameras in 6 Gbit/s Mode with Link Aggregation 2 on the ironman Frame Grabber
222. Basic Acquisition for Grayscale CoaxPress Area Scan Cameras in 6 Gbit/s Mode with Link Aggregation 4 on the ironman Frame Grabber
223. Basic Acquisition for Grayscale CoaxPress Area Scan Cameras in 6 Gbit/s Mode with Link Aggregation 4 on the marathon Frame Grabber
224. Basic Acquisition for Grayscale CoaxPress Line Scan Cameras in 6 GBit/s Mode with Link Aggregation 1 on the ironman Frame Grabber
225. Basic Acquisition for RGB CoaxPress Line Scan Cameras in 6 Gbit/s Mode with Link Aggregation 2 on the ironman Frame Grabber
226. Basic Acquisition for Grayscale CoaxPress Line Scan Cameras in 6 Gbit/s Mode with Link Aggregation 4 on the ironman Frame Grabber
227. Basic Acquisition for Grayscale CoaxPress Line Scan Cameras in 6 Gbit/s Mode with Link Aggregation 4 on the ironman Frame Grabber
228. Sinewave
229. FFT Result
230. FFT Result
231. Basic design structure
232. Content of box JPEGBlockSorter8x8
233. Rearangement of Pixel in JPEGBlockSorter8x8
234. Content of SplitImage box
235. Content of the RemoveFillByte box
236. Content of the RestartMarker box
237. Basic design structure
238. Top level design structure
239. Basic implementation of grayscale JPEG compression using operator JPEG_Encoder
240. Top level design structure
241. Basic implementation of color JPEG compression using user library elements
242. Artificial test image
243. Straight edge
244. Diagonal edge
245. Curved edge
246. Periodic structure
247. Bayer pattern
248. Basic design structure
249. Content of NearestNeighbour
250. Basic design structure
251. Content of HierarchicalBox Laplace
252. Content of HierarchicalBox SortToComponents
253. Basic design structure
254. Interpolation step 1 of the Bayer-demosaicing process
255. Content of ColourInterpolation
256. Content of the HierarchicalBox BlueAndRed
257. Original color image
258. Image demosaiced with the algorithm of Laroche et al. [Lar94]
259. Image demosaiced with an bilinear algorithm
260. Content of ColourInterpolation for the modified Laroche filter.
261. Sensor layout of a bilinear line scan camera with color pattern Red/BlueFollowedByGreen_GreenFollowedByBlue/Red
262. Basic design structure of "BilinearBayer_RG_GB.va"
263. Content of HierarchicalBox DeBayer
264. Content of HierarchicalBox DeBayerEnhancedRAW
265. Kernel components created in HierarchicalBox MakeKernel
266. Content of HierarchicalBox DeBayerRAW
267. Sensor layout of a bilinear line scan camera with color pattern Red/BlueFollowedByBlue/Red_GreenFollowedByGreen
268. Basic design structure of "BilinearBayer_RB_GG.va"
269. Content of HierarchicalBox DeBayer
270. Content of HierarchicalBox DeBayerEnhanced
271. Kernel components selected in HierarchicalBox DeBayerEnhanced by operator SelectSubKernel3x2
272. Content of HierarchicalBox DeBayerFast
273. Pre-Sorting of Color Components
274. Simulation Result of Pre-Sorted Color Components
275. Parameter Setting for XOffset of the ImageBufferMultiRoI Operator
276. Pre-Sorting for Color Separation by collecting eight successive pixel of the same component.
277. Color Separation with FrameBufferRandomRead
278. Address Generator for FrameBufferRandomRead Input
279. Block Diagram of the applet Hardware Test
280. Hardware Test Process0
281. Hardware Test Process1
282. Applet Hardware Test use of Parameter Translates and References in microDisplay
283. Applet Hardware Test Implementation for RAM Test, DMA Perfomance Test and Camera Acquisition
284. Use of FloatParamTranslator to Convert from Frames per Second to Ticks
285. Use of IntParamTranslator for easy Setting of the Width and Height in the Applet
286. Basic design structure of the VA design "TriggerAndImageStatistics.va"
287. Content of HierarchicalBox TriggerAnalysis
288. Content of HierarchicalBox CameraLink_InputStatistics
289. Content of HierarchicalBox Trigger_Statistics
290. Content of HierarchicalBox DelayAnalysis
291. Content of HierarchicalBox ImageAnalysis
292. Basic design structure of the VA design "GeometricTransformation_FrameBufferRandomRead.va"
293. Content of HierarchicalBox"GeometricTransformation"
294. Content of HierarchicalBox CoordinateTransformation
295. Content of HierarchicalBox OutputImage
296. Content of HierarchicalBox InverseTransformation
297. Source image [Ope16a]
298. Rotated and translated target image
299. Basic design structure of the VA design "GeometricTransformation_ImageMoments.va"
300. Content of the HierarchicalBox GeometricTransformation
301. Content of HierarchicalBox CoordinateTransformation
302. Content of HierarchicalBox InverseTransformation
303. Content of HierarchicalBox GeometricTransformation
304. Source image (dimension: 640x240 pixels)
305. Position and orientation corrected target image (dimension: 256x128 pixels)
306. Example: 8 Pixels are stored in one DRAM cell
307. Content of HierarchicalBox FrameBufferRandomRead_Par8
308. Basic design structure of the VA design "GeometricTransformation_DistortionCorrection.va"
309. Content of HierarchicalBox CoordinateTransformation
310. Content of HierarchicalBox KeystoneCorrection
311. Content of HierarchicalBox DistortionCorrection
312. Content of HierarchicalBox DistortionCoefficient
313. Example Source Image [Ope16a]
314. Distortion and Keystone corrected target image
315. Rotated, distortion and Keystone corrected target image
316. Basic design structure of the VA design "DistortionCorrection.va"
317. Content of HierarchicalBox DistortionCorrection
318. Content of HierarchicalBox InverseCorrection
319. Basic design structure
320. Content of ImageMoments
321. Content of the HierarchicalBox orientation_theta
322. Content of the HierarchicalBox eccentricity
323. Skew of a scanned object resulting from camera misalignment
324. Basic design structure
325. Content of HierarchicalBox LineShear
326. Content of HierarchicalBox ExtractInteger
327. Content of HierarchicalBox Select
328. Content of HierarchicalBox TransformedYCoordinate
329. Shift corrected image
330. Basic design structure for scaling a line camera image
331. Components of Transformation
332. Components of WordToRead
333. Components of PixelPicker
334. Content of Pick_0
335. Components of Interpolation
336. Basic design structure for "TapSorting_2XE_1Y.va"
337. Basic design structure of "TapSorting_2X_2Y.va"
338. Content of the HierarchicalBox Address in "TapSorting_2X_2Y.va"
339. Basic design structure of "TapSorting_8X_1Y.va"
340. Content of the HierarchicalBox Sorting_8X_1Y
341. Content of the HierarchicalBox Address in "TapSorting_8X_1Y.va"
342. Basic design structure
343. Content of box Trigger
344. Content of box HDR
345. Content of component Red in Image1
346. Content of box Red under HDR
347. Content of box LDR in the designs "HDR_CRC_Bayer.va" and "HDR_CRC_Color.va"
348. Content of box LDR in the design "HDR_CRC_Gray.va"
349. Basic design structure
350. Content of box HDR
351. Content of Red in box Image1
352. Content of Red in box HDR
353. Basic design structure of "ExposureFusion.va"
354. Content of HierarchicalBox ExposureFusion
355. Content of HierarchicalBox ImageComposition
356. Content of HierarchicalBox Weight
357. Content of HierarchicalBox Red in box Weight
358. Content of HierarchicalBox Red in box ImageComposition
359. Example input images with different exposure times
360. Result image of the 5 example input images after exposure fusion
361. Basic design structure
362. Content of HierarchicalBox DepthFromFocus
363. Content of HierarchicalBox CompareContrast
364. Content of HierarchicalBox SelectDepthIndex
365. Content of HierarchicalBox SelectPixelValue
366. Content of HierarchicalBox LastImageOfSequenceOnly
367. Basic Design structure of the VA designs "HOG_9Bins_Histogram.va","HOG_9Bins_HistogramMax.va" and "HOG_4Bins_HistogramMax.va"
368. Content of HierarchicalBiox HOG
369. Content of HierarchicalBox GradientFilter
370. Content of HierarchicalBox MagnitudeOrientation
371. Content of HierarchicalBox Histogram
372. Content of HierarchicalBox Bin1
373. Content of HierarchicalBox ConcatenateWithNeighbors
374. Content of HierarchicalBox GetHistogramMax
375. Basic design structure of the VA design "PrintInspection_Blob.va"
376. Content of the HierarchicalBox FindPatterns
377. Content of the HierarchicalBox ExtractCandidates
378. Content of the HierarchicalBox DetermingCOGTemplates
379. Content of the HierarchicalBox TemplateMatching
380. Content of the HierarchicalBox COG_Angle
381. Basic design structure of the VA design "PrintInspection_ImageMoments.va"
382. Basic design structure of "NormalizedCrossCorrelation.va"
383. Test image "PCB.tif"
384. Content of HierarchicalBox NCC
385. Content of HierarchicalBox Division
386. result image with "1" at object positions (zoomed view)
387. Hierarchical Box ImageTrigger of the TrgPortLine Rebuild Example
388. Hierarchical Box LineTrigger of the TrgPortLine Rebuild Example
389. Objects Visualized by Colored Boxes
390. 4-Connected Neighborhood
391. 8-Connected Neighborhood
392. Pixels allocated to objects in a 4-connected neighborhood (left) and an 8-connected neighborhood (right). All colored pixels represent foreground pixels where their allocation to objects is visualized by differing colors.
393. 4-connected neighborhood: Contour Orthogonal = 30, Diagonal = 0
394. 8-connected neighborhood: Contour Orthogonal = 14, Diagonal = 8
395. Calculation of the perimeter using an 8-connected neighborhood (left) and a 4-connected neighborhood (right)
396. Blob Analysis Operators
397. Behavior of the Blob Analysis 1D Operator
398. Synchronization of the Blob 1D Operator in a VisualApplets Network
399. Blob 1D Timing - Generation of New Frames
400. Blob 1D Timing - Suppression of Empty Frames
401. Blob 1D Timing - Constant Flush
402. Blob 1D Timing - Discarding of Objects
403. Simulation Scenario 1 - Flush and Y0 Relation
404. Simulation Scenario 2 - Flush Pixel Position
405. Simulation Scenario 3 - Discarded Flush Pixel at End of Frame
406. Simulation Scenario 4 - Multiple Blobs
407. Formula for calculating the minimum input image width
408. RAM architecture

List of Tables

1. Operator Types
2. List of Device Resources
3. Commands for Creating and Editing a VA Design in Tcl
4. Command Line Options and According Arguments
5. Shortcut List for Main Program Window
6. Shortcut List for Simulation Viewer
7. List of Basic Acquisition Examples
8. Design Versions for Grayscale JPEG Encoding
9. Design Versions for Color JPEG Encoding
10. List of Bayer Demosaicing Examples
11. Overview of Color Separation Examples
12. List of Geometric Transformation Examples
13. Reading Cycles
14. Files and their corresponding lookup tables in Visual Applets
15. Examples of tap geometries
16. Available Libraries
17. Operators of Library Accumulator
18. Operators of Library Arithmetics
19. Operators of Library Base
20. Examples
21. Explanation of pseudo-code
22. Examples
23. Examples
24. Operators of Library Blob
25. Explanation of Blob Error Flags
26. Explanation of Blob Error Flags
27. Operators of Library Color
28. Operators of Library Compression
29. Operators of Library Debugging
30. Operators of Library Filter
31. Operators of Library Logic
32. Memory Types of Operators in the Library Memory
33. Individual Latencies of the Operators in Library Memory
34. Operators of Library Memory
35. Data types supported by reference operators
36. Operators of Library Parameters
37. Basic operations
38. Functions
39. Basic operations
40. Functions
41. Basic operations
42. Functions
43. Operators of Library Hardware Platform
44. Mapping VA notation and CL Specification Version 2.1
45. Mapping VA notation and CL Specification Version 2.1
46. Mapping VA notation and CL Specification Version 2.1
47.
48.
49.
50.
51. Operators of Library Prototype
52. Operators of Library Signal
53. Operators of Library Synchronization
54. Operators of Library Transformation
55. Hardware Configuration microEnable IV and PixelPlant
56. Hardware Configuration microEnable 5 ironman
57. Hardware Configuration LightBridge and microEnable 5 marathon
58. List of Device Resources microEnable IV and PixelPlant
59. List of Device Resources microEnable 5 ironman
60. List of Device Resources LightBridge and microEnable 5 marathon