Operator TxLink

Operator Library: Hardware Platform

This operator provides a data link between the frame grabber to the pixelPlant boards Px100 and Px200 respectively from the pixelPlant boards to the frame grabbers. TxLink represents the output interface operator. The link is capable to transport data in any image format. The format of the link is specified automatically by the operator connected to the TxLink operator.

The parameter Channel_ID specifies the unique ID of the virtual data channel. This is necessary to address the corresponding receiver and establish the channel communication. The channel ID occupies one device resource of type TxLink. Check Appendix. Device Resources for a full list of device resources.

Data transfers are controlled by flow control of VisualApplets and do not need buffering, e.g., an RxLink input can be directly connected to a DmaFromPc operator without utilizing ImageBuffer operators. However, if an infinite source is used like any of the camera operators, buffering is still required before TxLink.

The data link is a virtual channel between the px100/200 boards and the mE4VD4-CL board. The maximal number of virtual TxLink channels must not exceed 61. Also consider to use as less as possible links to use the bandwidth and FPGA resources effectively. All virtual TxLink data channels are mapped internally on a single physical link of 1GByte/s bandwidth.

The Channel_IDs can be in any order and can start from any index between 1 and 61. However all indices must be unique. Note that on the receiver side on the RxLinks must have the same IDs as the TxLinks on the sender side.

TxLinks and RxLink on the same board do not share the same physical channel and are fully independent, i.e. RxLink and TxLink operators on the same board can have the same or different Channel_IDs and are not related to each other in any way.

[Note] Optimized Routing of designs with PixelPlant

To optimize the routing results (during build) of designs for mE4 with PixelPlant PX100/PX200/PX200e, we recommend to use settings for bit width and parallelism that ensure that the product of bit width and parallelism is a multiple of 64. The optimum routing results can be expected if the product is exactly 64.

product = n * 64

n = 1 leads to optimal routing results.

Very good routing results can also be expected if the product of bit width and parallelism is a power of two and less or equal 64, but not 1, 2, or 4. Other configurations may lead to timing errors.

Available for Hardware Platforms
mmicroEnable IV VD4-CL/-PoCL
pixelPlant 100
pixelPlant 200

I/O Properties

Property Value
Operator Type M
Input Link I, signal input

Supported Link Format

Link Parameter Input Link I
Bit Width [1, 64]
Arithmetic {unsigned, signed}
Parallelism any
Kernel Columns any
Kernel Rows any
Color Format any
Color Flavor any
Max. Img Width any
Max. Img Height any


Type static parameter
Default 1
Range [1, 61]

This parameter defines the unique channel ID for the data link.

Examples of Use

The use of operator TxLink is shown in the following examples: