During design phase the simulation sources and probes are very helpful. Using the simulation sources you can load test images and check your processed image on every link in the processing pipeline within a few moments. Exception: Signals can’t be simulated. Furthermore, the simulation performs a Design Rule Check Level 1 for the formal correctness of the implementation. The simulation result is equivalent to the result during runtime. You find the simulation sources and probes in the icon menu or under Analysis in the text menu in VisualApplets. For a detailed description of the usage of the simulation sources and probes, see the detailed documentation under 'Simulation'.
In Figure 172, 'Example Design Implementation Sobel_Filter.va' you can see a test image
loaded to a simulation source in the example design
Sobel_Filter.va. After threshold and before DMA you can
see the result of the current processing step.
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